Field of the Invention.
This invention generally relates to methods of bonding integrated circuit terminal pads to integrated circuit package leads. More specifically this invention especially relates to single point bond processes adapted for use in conjunction with tape-automated-bonding (TAB) tape.
2. Description of the Prior Art
Many factors contribute to the overall cost of manufacturing integrated circuits. For example, the cost of the purified silicon material used in each circuit element is an important factor. However, other important cost considerations revolve around the fact that all such integrated circuit elements, once produced, must be interconnected with each other, as well as with other circuit components, into an assembled package. One must also consider the costs associated with the rate of failure in performing a succession of steps that reduce, at each stage of the process, the number of survivors of that process. This is particularly true in the context of manufacturing integrated circuits because most of the basic methods of manufacture often involve a succession of operations which are each characterized by certain attendant yield losses. For example, attritional losses occur at each oxide-removal and diffusion step of the manufacturing process. This is due to a variety of causes, e.g., imperfections in the original silicon, incomplete cleaning of slices, uneven photoresist application and removal, the presence of dust particles and/or other unwanted impurities in diffused areas, incomplete control over the etching process and mechanical breakage of the integrated circuit devices. Although the loss in each such operation may be small, e.g., 1 or 2 percent, there usually are so many sequential operations that the yield up to the end of the manufacturing process i.e., scribing the slice into chips and then sorting them, can be rather low. Ultimate yields of between 10 and 40%, depending on the circuit, are not at all uncommon.
Furthermore, after their manufacture, integrated circuit elements also may be damaged during assembly operations and there may well be further losses at the point of final test due to units not meeting specifications. Thus, the ultimate yield can be as low as say 5% to 20%, again depending on the type of integrated circuit being manufactured. Such yields would be considered unacceptably low when compared to yields in discrete component electronic assemblies. However, since, on only one slice, up to 500 circuits may be fabricated simultaneously, the overall economics are such that the final costs still may well be substantially lower than a corresponding discrete component assembly.
Moreover, after the integrated circuits are completely manufactured there remains the necessity of proper emplacement and secure interconnection of all such integrated circuit elements by means of conduits of some kind of highly conductive material. Such interconnections are fundamental to all integrated circuit manufacturing operations. The question of compatibility of materials also arises in making such interconnections. That is to say different and incompatible materials sometimes have to be made compatible with each other. For example, a copper conductor wire is not necessarily compatible with an aluminum pad, but each material may have been selected for its own virtues, in the context of other circuit function considerations, and hence the two elements may have to be electrically and mechanically associated with each other at some point in the integrated circuit device. Thus, in providing methods for making such connections, an interface material sometimes must be introduced to produce a mutual compatibility of each two or more otherwise incompatible elements. In the integrated circuit arts, gold and tin are often used for this purpose in conjunction with various thermal ultrasonic and/or compression bonding processes.
For example, one of the earliest practical applications of thermal compression bonding in the integrated circuit arena was the so-called "ball bonding" process. With it, a gold wire, about 1 mil in diameter, is fed through a capillary needle and a minute hydrogen gas flame is passed across the wire as it emerges from the capillary tip. The flame melts the end of the wire and forms a tiny globule of molten gold. An electrical assembly is then heated together with a pad to which the bond is to be made. The capillary is then lowered so the ball on the end of the wire contacts the thermal pad on the chip. The lowering process can be made to proceed in such a manner that the capillary tip actually pushes and flattens the gold ball. This combination of pressure and temperature results in the desired bond between the gold and say an aluminum or aluminum alloy bonding pad. The capillary can then be raised on the fixed gold wire and removed horizontally to a terminal where the wire can be welded. The capillary is then raised and the wire cut by the hydrogen flame. This action forms a new gold ball; hence, the operation is ready to be repeated. This method, although effective, is slow and cumbersome. Hence, alternative methods were developed to circumvent these problems. Most of the alternative methods usually involve the placement of a gold globule, usually referred to as a "bump", in advance of the lead/chip connection process. Such gold bumps have been placed both o the terminal pad of the chip and on the underside of the lead or copper wire to be connected to the chip.
In order to fully appreciate some of the advantages of the direct bonding process of this patent disclosure, it is first necessary to have some appreciation for the complexities of these alternative methods, especially those involved in fashioning gold bumps on chips. Generally these methods are referred to as "old bump bonding" or "gold bump thermal compression bonding". They have heretofore proven to be one of the most feasible means of precision localization, registration, connection and segregation of wire lead/pad bonds. The complexities of this bonding technique are best understood by examining the sequence of the major steps taken in this bonding technology since an understanding of them will serve to demonstrate the improvements in productivity, quality, precision and reliability of the process produced by this patent disclosure.
To this end, FIGS. 1 to 3 show a typical prior art method for forming gold bumps. Here, an integrated circuit chip 10 is shown as being comprised of a platinum film 16 formed over a titanium film 14 which in turn is formed on an insulating substrate 12. As is shown in FIG. 1, an organic photoresist 18 is then applied over the platinum film 16. FIG. 2 indicates how the organic photoresist 18 is then patterned by using a photo mask so as to make a dummy wafer having openings 22 for forming gold bumps. Then, as shown in FIG. 3, bumps 20 of gold are formed by plating by using the titanium film 14 and the platinum film 16 as the plating electrode. The organic photoresist 18 is then removed by using an organic solvent so as to prevent softening or transformation of the organic photoresist 18 and to prevent adhering of the organic photoresist 18 to the gold bumps 20 or to the tool for thermo-compression bonding. This preventive step is important since such adherence would have a bad influence upon bonding the gold bumps to the bonding pads of the semiconductor element. As is indicated in FIG. 4, the organic photoresist then must be again applied, patterned and removed in order to again form the gold bumps 20. In this prior art method, the removing step must take place before the first bonding, because the organic photoresist 18 is used as a mask for the plating. Furthermore, this necessitates repetition of the above-mentioned steps after the application step of the organic photoresist 18. Therefore, this prior art method is expensive both in the material cost of the organic photoresist 18 and in the time and equipment needed to carry out such complex operations.
Obviously such a degree of complexity in fabricating gold bumps has produced numerous attempts to make improvements in the technique. For example, U.S. Pat. No. 4,676,864 teaches a bonding method characterized by its not having a removal step of the photo-resist as a mask for the plating operation. Generally the process involves: (1) forming a photoresist film having a predetermined pattern on a conductive layer formed on a dummy wafer, (2) depositing a heat-resistent insulating layer all over the surface of said dummy wafer, (3) removing said photoresist film together with said heat-resistive insulating layer deposited thereon, thereby forming openings, (4) forming gold bumps on said openings by plating using said heat-resisting insulating layer as a mask and using said conductive layer as a plating electrode, (5) transferring said bumps to inner leads from said dummy wafer, and (6) thermo-compression bonding the said bumps of the inner leads to bonding pads of the semiconductor element. Obviously this method is not without its own complexities.
Furthermore, all such gold bump bonding techniques have certain spatial and mechanical drawbacks. Many of these follow from the fact that such gold "bumps" often have a nearly half-round or three-quarter round top contour. This makes for mating problems because they are generally connected to round or flat, ribbon-like tapes. Thus for example when an essentially flat ribbon-like tape is forced down on to an essentially ball like globule of gold, the tape is sometimes apt to slide off the top of the ball and be skewed or otherwise tilted off to one side or the other. Such skew or tilt can, in turn, cause the tape to touch parts of the I.C. chip other than the pad. The tape can for example come into contact with other parts of the I.C. chip and/or in contact with adjacent leads.
Moreover since such gold bumps must be kept as small as possible for obvious economic reasons, they typically are less than about 0.5 thousands if an inch high. Hence when the lead wires and/or lead tapes are pressed down on top of such gold bumps, the tape, ribbon or wire may sag or otherwise deform in the region where the force is applied and come into contact with parts of the I.C. chip other than the aluminum pad. It is well known in the art that such leads are particularly apt to come into unwanted contact with the edges (e.g., point 25 of FIG. 7) of the I.C. die. Again, any such contact is very detrimental to the clear passage of electrical signals.
Those skilled in the art will also appreciate that in this context, considerable exigencies and problems are associated with making such integrated circuit connections at spacings which often have tolerances well below 1/10 of a thousandth of an inch. Furthermore, these severe tolerances in no way diminish the requirement that such connections be electrically sound and mechanical strong.
Another response to the above noted problems of making certain difficult electrical connections (e.g., a copper wire to an aluminum pad) was the production of tape-automated-bonding (TAB) tapes of the type manufactured by the Minnesota Mining and Manufacturing (3M) Company of Minneapolis, Minn. Typically these tapes are comprised of a thin copper ribbon coated with a gold or a tin coating. Thus, for example the gold coating of the TAB tape bonds more easily melts into a gold bump because no amalgamation is required.
Again, in making such TAB tape/bonding pad connections, two bonding methods have been widely employed. One involves connecting the inner leads with gold bumps previously formed on the bonding pads of the semiconductor element by means of a thermo-compression bond. With the other method, gold bumps, previously formed on the inner leads, are thermo-compression bonded to the bonding pads of the semiconductor element. These two processes are generally depicted in FIGS. 5 and 6.
There are however several drawbacks to these processes. As previously noted, the former requires the previously described, technically difficult, process for forming the gold bumps directly on the semiconductor element. This process is also rather expensive. Therefore, it is not widely used in making conventional integrated circuit chip connections. The latter method does in effect avoid the difficult process of forming the gold bumps directly on the semiconductor element. The gold bumps are pre-formed on the inner leads. In generally, this method of connection is less expensive than the above noted method of placing the gold bump on a chip. However, this method still requires a globule of a very expensive material-gold--for each such connection. Moreover, this process also increases the cost of the TAB tape by addition of a "bumping process" with its own attendant yield losses.
For all of the above noted reasons, the overall success of producing such integrated circuit connections must necessarily include a succession of absolutely necessary operations and each operation must deal with certain spatial, mechanical strength and electrical considerations and implications. For example at least two elements which are to be connected e.g., a lead and a contact pad, must be precisely positioned with respect to each other to very precise dimensions and tolerances. Any unintended contact of the leads implies a loss or garbling of an electrical signal, not just a loss of power. Therefore, any ability to more accurately an successfully make such lead/pad connections represents a very fundamental and valuable advantage.
Those skilled in this art also will appreciate that while the electrical arts have heretofore employed various bonding techniques which do not involve any intermediary bonding material such as gold the hereinafter disclosed processes are different in concept as well as degree. For example, in the past prior art processes, materials have been made to invade, to shallow, . but predictable, depths, what would appear to be a solid impermeable mass. One of the most notable and widely used techniques for accomplishing this is in the context of integrated circuits the diffusion of dopants, at high temperatures, from a vapor phase into a solid silicon substrate. The actual diffusion is often promoted by the vibration of the atoms of the solid crystalline lattice. This vibration, in turn, induces microscopic changes in the inter-atomic distances. When this occurs under a cloud of relatively densed packed vapor molecules, especially those which are highly thermally agitated, the surface layers of the crystal will be penetrated and, to some shallow depth, pervaded by atoms of the vapor substance. The amount of such permeation will usually depend upon stearic considerations at the molecular level as well as upon whatever mechanical agitation is used to promote the process. Similarly, those skilled in this art will also appreciate that a clamping two dissimilar materials along a well mated surface for extended periods of time will result in some permeability or mutuality of one material into the other.
In the case of such solid/solid bonding, as it is well known that certain deliberate physical efforts can be applied to promote greater intimacy of interface materials in order to produce maximum conductivity and intercrystalline association and thereby create such bonds without relying upon any foreign material such as gold. These physical efforts usually comprise:
(1) use of heating temperatures up to about 1200.degree. C.,
(2) use of vibrations, supplied by means of ultrasonic oscillations, at frequencies which depend upon the moment of inertia of the atoms in the crystalline lattice and at amplitudes approximating the interatomic distances of the lattice, and
(3) use of direct mechanical pressure, applied normal to the interface of the desired bonds, to promote diffusion.
However, these bonding techniques have not heretofore been applied to the bonding of TAB leads to Aluminum bonding pads in general, and while incorporating a downset in the inner lead in particular. Hence this invention is particularly concerned with accomplishing a direct bonding of certain solids without the use of gold , bumps, especially in the context of making those electrical connections which are particularly associated with the production of integrated circuits devices.